diff --git a/.github/workflows/test-configs.yml b/.github/workflows/test-configs.yml index a84cde0ccc..47a8af826e 100644 --- a/.github/workflows/test-configs.yml +++ b/.github/workflows/test-configs.yml @@ -140,6 +140,20 @@ jobs: config-file: ./config/examples/lpc54606j512.config board-name: lpcxpresso55s06 + lpc55s69_test: + uses: ./.github/workflows/test-build-mcux-sdk-manifests.yml + with: + arch: arm + config-file: ./config/examples/lpc55s69.config + board-name: lpcxpresso55s69 + + lpc55s69_tz_test: + uses: ./.github/workflows/test-build-mcux-sdk-manifests.yml + with: + arch: arm + config-file: ./config/examples/lpc55s69-tz.config + board-name: lpcxpresso55s69 + nrf52840_test: uses: ./.github/workflows/test-build.yml with: diff --git a/CMakeLists.txt b/CMakeLists.txt index 2e10af46d0..0863a4bf0f 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -388,6 +388,7 @@ if(NOT DEFINED ARM_TARGETS) imx_rt kinetis lpc54606j512 + lpc55s69 mcxa mcxw mcxn diff --git a/arch.mk b/arch.mk index 10f4c6a0a1..c50ff65be8 100644 --- a/arch.mk +++ b/arch.mk @@ -1112,6 +1112,48 @@ ifeq ($(TARGET),lpc) endif endif +ifeq ($(TARGET),lpc55s69) + ifneq ($(TZEN),1) + LSCRIPT_IN=hal/$(TARGET)-ns.ld + endif + CFLAGS+=\ + -I$(MCUXPRESSO_PROJECT_TEMPLATE) \ + -I$(MCUXPRESSO_DRIVERS) \ + -I$(MCUXPRESSO_DRIVERS)/drivers \ + -I$(MCUXPRESSO_DRIVERS)/../periph \ + -I$(MCUXPRESSO)/drivers \ + -I$(MCUXPRESSO)/drivers/common \ + -I$(MCUXPRESSO)/drivers/flexcomm \ + -I$(MCUXPRESSO)/drivers/flexcomm/usart \ + -I$(MCUXPRESSO)/drivers/iap1 \ + -I$(MCUXPRESSO)/drivers/lpc_gpio \ + -I$(MCUXPRESSO)/drivers/lpc_iocon \ + -I$(MCUXPRESSO)/drivers/rng_1 \ + -I$(MCUXPRESSO_CMSIS)/Include \ + -I$(MCUXPRESSO_CMSIS)/Core/Include + CFLAGS+=-DCPU_$(MCUXPRESSO_CPU) + CFLAGS+=-DFSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL=1 + CFLAGS+=-DFSL_SDK_DISABLE_DRIVER_RESET_CONTROL=1 + CFLAGS+=-mcpu=cortex-m33 -DCORTEX_M33 -U__ARM_FEATURE_DSP + LDFLAGS+=-mcpu=cortex-m33 -Wl,--no-warn-rwx-segments + OBJS+=\ + $(MCUXPRESSO_PROJECT_TEMPLATE)/clock_config.o \ + $(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \ + $(MCUXPRESSO_DRIVERS)/drivers/fsl_power.o \ + $(MCUXPRESSO)/drivers/common/fsl_common_arm.o \ + $(MCUXPRESSO)/drivers/iap1/fsl_iap.o \ + $(MCUXPRESSO)/drivers/lpc_gpio/fsl_gpio.o + ifeq ($(WOLFCRYPT_TZ),1) + OBJS+=$(MCUXPRESSO)/drivers/rng_1/fsl_rng.o + endif + ifeq ($(DEBUG_UART),1) + OBJS+=\ + $(MCUXPRESSO_DRIVERS)/drivers/fsl_reset.o \ + $(MCUXPRESSO)/drivers/flexcomm/fsl_flexcomm.o \ + $(MCUXPRESSO)/drivers/flexcomm/usart/fsl_usart.o + endif +endif + ifeq ($(TARGET),psoc6) CORTEX_M0=1 OBJS+=\ diff --git a/config/examples/lpc55s69-tz.config b/config/examples/lpc55s69-tz.config new file mode 100644 index 0000000000..f708099321 --- /dev/null +++ b/config/examples/lpc55s69-tz.config @@ -0,0 +1,45 @@ +ARCH?=ARM +TZEN?=1 +TARGET?=lpc55s69 +SIGN?=ECC384 +HASH?=SHA384 +MCUXSDK?=1 +MCUXPRESSO?=$(PWD)/../NXP/mcuxpresso-sdk/mcuxsdk +MCUXPRESSO_CMSIS?=$(PWD)/../NXP/CMSIS_5/CMSIS +MCUXPRESSO_CPU?=LPC55S69JBD100_cm33_core0 +MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/LPC/LPC5500/LPC55S69 +MCUXPRESSO_PROJECT_TEMPLATE?=$(MCUXPRESSO)/examples/_boards/lpcxpresso55s69/project_template +DEBUG?=0 +DEBUG_UART?=1 +VTOR?=1 +CORTEX_M0?=0 +CORTEX_M33?=1 +NO_ASM?=0 +NO_MPU=1 +EXT_FLASH?=0 +SPI_FLASH?=0 +ALLOW_DOWNGRADE?=0 +NVM_FLASH_WRITEONCE?=1 +NO_ARM_ASM=1 +WOLFBOOT_VERSION?=0 +V?=0 +SPMATH?=1 +RAM_CODE?=1 +DUALBANK_SWAP?=0 +PKA?=1 +FLASH_MULTI_SECTOR_ERASE?=1 +WOLFCRYPT_TZ?=1 +WOLFCRYPT_TZ_PKCS11?=1 + +# 512-byte pages erasable/writeable +WOLFBOOT_SECTOR_SIZE?=0x200 + +# 200KB boot, 80KB keyvault, 8KB NSC, 56KB partitions, 512 swap +WOLFBOOT_KEYVAULT_ADDRESS?=0x10032000 +WOLFBOOT_KEYVAULT_SIZE?=0x14000 +WOLFBOOT_NSC_ADDRESS?=0x10046000 +WOLFBOOT_NSC_SIZE?=0x2000 +WOLFBOOT_PARTITION_SIZE?=0xE000 +WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x00048000 +WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x00056000 +WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x00064000 diff --git a/config/examples/lpc55s69.config b/config/examples/lpc55s69.config new file mode 100644 index 0000000000..7020831a62 --- /dev/null +++ b/config/examples/lpc55s69.config @@ -0,0 +1,40 @@ +ARCH?=ARM +TZEN?=0 +TARGET?=lpc55s69 +SIGN?=ECC384 +HASH?=SHA384 +MCUXSDK?=1 +MCUXPRESSO?=$(PWD)/../NXP/mcuxpresso-sdk/mcuxsdk +MCUXPRESSO_CMSIS?=$(PWD)/../NXP/CMSIS_5/CMSIS +MCUXPRESSO_CPU?=LPC55S69JBD100_cm33_core0 +MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/LPC/LPC5500/LPC55S69 +MCUXPRESSO_PROJECT_TEMPLATE?=$(MCUXPRESSO)/examples/_boards/lpcxpresso55s69/project_template +DEBUG?=0 +DEBUG_UART?=1 +VTOR?=1 +CORTEX_M0?=0 +CORTEX_M33?=1 +NO_ASM?=0 +NO_MPU=1 +EXT_FLASH?=0 +SPI_FLASH?=0 +ALLOW_DOWNGRADE?=0 +NVM_FLASH_WRITEONCE?=1 +NO_ARM_ASM=1 +WOLFBOOT_VERSION?=0 +V?=0 +SPMATH?=1 +RAM_CODE?=1 +DUALBANK_SWAP?=0 +PKA?=1 +FLASH_MULTI_SECTOR_ERASE?=1 + +# 512-byte pages erasable/writeable +WOLFBOOT_SECTOR_SIZE?=0x200 + +# Default configuration +# 40KB boot, 44KB partitions, 512 swap +WOLFBOOT_PARTITION_SIZE?=0xB000 +WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xA000 +WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x15000 +WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x20000 diff --git a/docs/Targets.md b/docs/Targets.md index 3217652c0d..e82aa13990 100644 --- a/docs/Targets.md +++ b/docs/Targets.md @@ -20,6 +20,7 @@ This README describes configuration of supported targets. * [NXP iMX-RT](#nxp-imx-rt) * [NXP Kinetis](#nxp-kinetis) * [NXP LPC54xxx](#nxp-lpc54xxx) +* [NXP LPC55S69](#nxp-lpc55s69) * [NXP LS1028A](#nxp-ls1028a) * [NXP MCXA153](#nxp-mcxa153) * [NXP MCXW716](#nxp-mcxw716) @@ -1731,6 +1732,315 @@ arm-none-eabi-gdb wolfboot.elf -ex "target remote localhost:3333" ``` +## NXP LPC55S69 + +The NXP LPC55S69 is a dual-core Cortex-M33 microcontroller. The support has been +tested on the LPCXpresso55S69 board (LPC55S69-EVK), with the on-board LINK2 configured in +the default CMSIS-DAP mode. + +This requires the NXP MCUXpresso SDK. We tested using +[mcuxsdk-manifests](https://github.com/nxp-mcuxpresso/mcuxsdk-manifests) and +[CMSIS_5](https://github.com/nxp-mcuxpresso/CMSIS_5) placed under "../NXP". + +To set up the MCUXpresso SDK: + +``` +cd ../NXP + +# Install west +python -m venv west-venv +source west-venv/bin/activate +pip install west + +# Set up the repository +west init -m https://github.com/nxp-mcuxpresso/mcuxsdk-manifests.git mcuxpresso-sdk +cd mcuxpresso-sdk +west update_board --set board lpcxpresso55s69 + +deactivate +``` + +### LPC55S69: Configuring and compiling + +Copy the example configuration file and build with make: + +```sh +cp config/examples/lpc55s69.config .config +make +``` + +We also provide a TrustZone configuration at `config/examples/lpc55s69-tz.config`. + +### LPC55S69: Loading the firmware + +Download and install the LinkServer tool: +[@NXP: LinkServer for microcontrollers](https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER#downloads) + +NOTE: The LPCXpresso55S69's on-board LINK2 debugger comes loaded with CMSIS-DAP protocol, but it can be +optionally updated to use JLink protocol instead. See the EVK user manual for how to do this, if desired. +The below examples were tested with the default CMSIS-DAP protocol. CMSIS-DAP is supported by default in +the MCUXpresso IDE for debugging purposes. + +Connect a USB cable from your development PC to P6 on the dev board. + +Open a terminal to the virtual COM port with putty or similar app, settings 115200-N-8-1. + +### LPC55S69: Testing firmware factory.bin + +1) Erase the entire flash: + +```sh +LinkServer flash LPC55S69 erase +``` + +2) Program the factory.bin, which contains both wolfBoot and the test-app version 1: + +```sh +LinkServer flash LPC55S69 load factory.bin:0 +``` + +3) The LED will light up blue to indicate version 1 of the firmware is running. You should also see output +like this in the terminal window: + +```sh +lpc55s69 init +Boot partition: 0xA000 (sz 24016, ver 0x1, type 0x601) +Partition 1 header magic 0xFFFFFFFF invalid at 0x15000 +Boot partition: 0xA000 (sz 24016, ver 0x1, type 0x601) +Booting version: 0x1 +lpc55s69 init + boot: ver=0x1 state=0xFF + update: ver=0x0 state=0xFF +Calling wolfBoot_success() + boot: ver=0x1 state=0x00 + update: ver=0x0 state=0xFF +``` + +### LPC55S69: Testing firmware update + +1) Sign the test-app with version 2: + +```sh +./tools/keytools/sign --ecc384 --sha384 test-app/image.bin wolfboot_signing_private_key.der 2 +``` + +2) Flash v2 update binary to your `.config`'s `WOLFBOOT_PARTITION_UPDATE_ADDRESS` + +Example: +```sh +LinkServer flash LPC55S69 load test-app/image_v2_signed.bin:0x15000 +``` + +3) You should see output like this in the terminal window: + +```sh +lpc55s69 init +Boot partition: 0xA000 (sz 24016, ver 0x1, type 0x601) +Update partition: 0x15000 (sz 24016, ver 0x2, type 0x601) +Boot partition: 0xA000 (sz 24016, ver 0x1, type 0x601) +Booting version: 0x1 +lpc55s69 init + boot: ver=0x1 state=0x00 + update: ver=0x2 state=0xFF +Update detected, version: 0x2 +Triggering update... + boot: ver=0x1 state=0x00 + update: ver=0x2 state=0x70 +...done. Reboot to apply. +``` + +4) Press the RESET button to reboot + +5) The LED will light up green to indicate version 2 of the firmware is running. You should also see output +like this in the terminal window: + +```sh +lpc55s69 init +Update partition: 0x15000 (sz 24016, ver 0x2, type 0x601) +Boot partition: 0xA000 (sz 24016, ver 0x1, type 0x601) +Update partition: 0x15000 (sz 24016, ver 0x2, type 0x601) +Starting Update (fallback allowed 0) +Update partition: 0x15000 (sz 24016, ver 0x2, type 0x601) +Boot partition: 0xA000 (sz 24016, ver 0x1, type 0x601) +Versions: Current 0x1, Update 0x2 +Copy sector 0 (part 1->2) +Copy sector 0 (part 0->1) +Copy sector 0 (part 2->0) +Boot partition: 0xA000 (sz 24016, ver 0x2, type 0x601) +Update partition: 0x15000 (sz 24016, ver 0x1, type 0x601) +Copy sector 1 (part 1->2) +Copy sector 1 (part 0->1) +Copy sector 1 (part 2->0) +Copy sector 2 (part 1->2) +Copy sector 2 (part 0->1) +Copy sector 2 (part 2->0) +Copy sector 3 (part 1->2) +Copy sector 3 (part 0->1) +Copy sector 3 (part 2->0) +Copy sector 4 (part 1->2) +Copy sector 4 (part 0->1) +Copy sector 4 (part 2->0) +Copy sector 5 (part 1->2) +Copy sector 5 (part 0->1) +Copy sector 5 (part 2->0) +Copy sector 6 (part 1->2) +Copy sector 6 (part 0->1) +Copy sector 6 (part 2->0) +Copy sector 7 (part 1->2) +Copy sector 7 (part 0->1) +Copy sector 7 (part 2->0) +Copy sector 8 (part 1->2) +Copy sector 8 (part 0->1) +Copy sector 8 (part 2->0) +Copy sector 9 (part 1->2) +Copy sector 9 (part 0->1) +Copy sector 9 (part 2->0) +Copy sector 10 (part 1->2) +Copy sector 10 (part 0->1) +Copy sector 10 (part 2->0) +Copy sector 11 (part 1->2) +Copy sector 11 (part 0->1) +Copy sector 11 (part 2->0) +Copy sector 12 (part 1->2) +Copy sector 12 (part 0->1) +Copy sector 12 (part 2->0) +Copy sector 13 (part 1->2) +Copy sector 13 (part 0->1) +Copy sector 13 (part 2->0) +Copy sector 14 (part 1->2) +Copy sector 14 (part 0->1) +Copy sector 14 (part 2->0) +Copy sector 15 (part 1->2) +Copy sector 15 (part 0->1) +Copy sector 15 (part 2->0) +Copy sector 16 (part 1->2) +Copy sector 16 (part 0->1) +Copy sector 16 (part 2->0) +Copy sector 17 (part 1->2) +Copy sector 17 (part 0->1) +Copy sector 17 (part 2->0) +Copy sector 18 (part 1->2) +Copy sector 18 (part 0->1) +Copy sector 18 (part 2->0) +Copy sector 19 (part 1->2) +Copy sector 19 (part 0->1) +Copy sector 19 (part 2->0) +Copy sector 20 (part 1->2) +Copy sector 20 (part 0->1) +Copy sector 20 (part 2->0) +Copy sector 21 (part 1->2) +Copy sector 21 (part 0->1) +Copy sector 21 (part 2->0) +Copy sector 22 (part 1->2) +Copy sector 22 (part 0->1) +Copy sector 22 (part 2->0) +Copy sector 23 (part 1->2) +Copy sector 23 (part 0->1) +Copy sector 23 (part 2->0) +Copy sector 24 (part 1->2) +Copy sector 24 (part 0->1) +Copy sector 24 (part 2->0) +Copy sector 25 (part 1->2) +Copy sector 25 (part 0->1) +Copy sector 25 (part 2->0) +Copy sector 26 (part 1->2) +Copy sector 26 (part 0->1) +Copy sector 26 (part 2->0) +Copy sector 27 (part 1->2) +Copy sector 27 (part 0->1) +Copy sector 27 (part 2->0) +Copy sector 28 (part 1->2) +Copy sector 28 (part 0->1) +Copy sector 28 (part 2->0) +Copy sector 29 (part 1->2) +Copy sector 29 (part 0->1) +Copy sector 29 (part 2->0) +Copy sector 30 (part 1->2) +Copy sector 30 (part 0->1) +Copy sector 30 (part 2->0) +Copy sector 31 (part 1->2) +Copy sector 31 (part 0->1) +Copy sector 31 (part 2->0) +Copy sector 32 (part 1->2) +Copy sector 32 (part 0->1) +Copy sector 32 (part 2->0) +Copy sector 33 (part 1->2) +Copy sector 33 (part 0->1) +Copy sector 33 (part 2->0) +Copy sector 34 (part 1->2) +Copy sector 34 (part 0->1) +Copy sector 34 (part 2->0) +Copy sector 35 (part 1->2) +Copy sector 35 (part 0->1) +Copy sector 35 (part 2->0) +Copy sector 36 (part 1->2) +Copy sector 36 (part 0->1) +Copy sector 36 (part 2->0) +Copy sector 37 (part 1->2) +Copy sector 37 (part 0->1) +Copy sector 37 (part 2->0) +Copy sector 38 (part 1->2) +Copy sector 38 (part 0->1) +Copy sector 38 (part 2->0) +Copy sector 39 (part 1->2) +Copy sector 39 (part 0->1) +Copy sector 39 (part 2->0) +Copy sector 40 (part 1->2) +Copy sector 40 (part 0->1) +Copy sector 40 (part 2->0) +Copy sector 41 (part 1->2) +Copy sector 41 (part 0->1) +Copy sector 41 (part 2->0) +Copy sector 42 (part 1->2) +Copy sector 42 (part 0->1) +Copy sector 42 (part 2->0) +Copy sector 43 (part 1->2) +Copy sector 43 (part 0->1) +Copy sector 43 (part 2->0) +Copy sector 44 (part 1->2) +Copy sector 44 (part 0->1) +Copy sector 44 (part 2->0) +Copy sector 45 (part 1->2) +Copy sector 45 (part 0->1) +Copy sector 45 (part 2->0) +Copy sector 46 (part 1->2) +Copy sector 46 (part 0->1) +Copy sector 46 (part 2->0) +Copy sector 47 (part 1->2) +Copy sector 47 (part 0->1) +Copy sector 47 (part 2->0) +Erasing remainder of partition (38 sectors)... +Boot partition: 0xA000 (sz 24016, ver 0x2, type 0x601) +Update partition: 0x15000 (sz 24016, ver 0x1, type 0x601) +Copy sector 85 (part 0->2) +Copied boot sector to swap +Boot partition: 0xA000 (sz 24016, ver 0x2, type 0x601) +Booting version: 0x2 +lpc55s69 init + boot: ver=0x2 state=0x10 + update: ver=0x1 state=0xFF +Calling wolfBoot_success() + boot: ver=0x2 state=0x00 + update: ver=0x1 state=0xFF +``` + +### LPC55S69: Debugging + +Debugging with GDB: + +Note: We include a `.gdbinit` in the wolfBoot root that loads the wolfboot and test-app elf files. + +In one terminal: `LinkServer gdbserver LPC55S69` + +In another terminal use `gdb`: + +``` +b main +mon reset +c +``` + + ## NXP LS1028A The LS1028A is a AARCH64 armv8-a Cortex-A72 processor. Support has been tested with the NXP LS1028ARDB. @@ -1743,7 +2053,7 @@ Example configurations for this target are provided in: 1. Download `aarch64-none-elf-` toolchain. -2. Copy the example `nxp-ls1028a.cofig` file to root directory and rename to `.config` +2. Copy the example `nxp-ls1028a.config` file to root directory and rename to `.config` 3. Build keytools and wolfboot diff --git a/hal/lpc55s69-ns.ld b/hal/lpc55s69-ns.ld new file mode 100644 index 0000000000..b6e14cd3bd --- /dev/null +++ b/hal/lpc55s69-ns.ld @@ -0,0 +1,55 @@ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = @WOLFBOOT_PARTITION_BOOT_ADDRESS@ + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + +SECTIONS +{ + .text : + { + _start_text = .; + KEEP(*(.isr_vector)) + . = 0x200; + *(.keystore*) + *(.text*) + *(.rodata*) + *(.init*) + *(.fini*) + . = ALIGN(4); + _end_text = .; + } > FLASH + + .edidx : + { + . = ALIGN(4); + *(.ARM.exidx*) + } > FLASH + + _stored_data = .; + + .data : AT (_stored_data) + { + _start_data = .; + KEEP(*(.data*)) + . = ALIGN(4); + KEEP(*(.ramcode)) + . = ALIGN(4); + _end_data = .; + } > RAM + + .bss (NOLOAD) : + { + _start_bss = .; + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + _end_bss = .; + __bss_end__ = .; + _end = .; + } > RAM + . = ALIGN(4); +} + +END_STACK = ORIGIN(RAM) + LENGTH(RAM); diff --git a/hal/lpc55s69.c b/hal/lpc55s69.c new file mode 100644 index 0000000000..67d7637cb7 --- /dev/null +++ b/hal/lpc55s69.c @@ -0,0 +1,308 @@ +/* lpc55s69.c + * + * Copyright (C) 2026 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +#include +#include +#include +#include "fsl_common.h" +#include "image.h" + +#include "clock_config.h" +#include "fsl_clock.h" +#include "fsl_iap.h" +#include "fsl_iocon.h" +#include "fsl_reset.h" +#include "fsl_rng.h" +#include "fsl_usart.h" +#include "loader.h" + +#ifdef TZEN +#include "hal/armv8m_tz.h" +#endif + +static flash_config_t pflash; +static const uint32_t pflash_page_size = 512U; +uint32_t SystemCoreClock; /* set in clock_config.c */ + +#ifdef TZEN +static void hal_sau_init(void) +{ + /* Non-secure callable area */ + sau_init_region(0, WOLFBOOT_NSC_ADDRESS, + WOLFBOOT_NSC_ADDRESS + WOLFBOOT_NSC_SIZE - 1, 1); + + /* Non-secure: application flash area (boot+update partition) */ + sau_init_region(1, WOLFBOOT_PARTITION_BOOT_ADDRESS, + WOLFBOOT_PARTITION_BOOT_ADDRESS + (WOLFBOOT_PARTITION_SIZE * 2) - 1, + 0); + + /* Non-secure RAM */ + sau_init_region(2, 0x20020000, 0x20027FFF, 0); + + /* Peripherals */ + sau_init_region(3, 0x40000000, 0x4003FFFF, 0); + sau_init_region(4, 0x40080000, 0x400AFFFF, 0); + sau_init_region(5, 0x40100000, 0x4010FFFF, 0); + + /* Enable SAU */ + SAU_CTRL = SAU_INIT_CTRL_ENABLE; + + /* Enable securefault handler */ + SCB_SHCSR |= SCB_SHCSR_SECUREFAULT_EN; +} + +static void periph_unsecure(void) +{ + CLOCK_EnableClock(kCLOCK_Iocon); + CLOCK_EnableClock(kCLOCK_Gpio1); +} +#endif + +static void hal_flash_fix_ecc(void) +{ + uint8_t page_buf[512]; + uint32_t addr; + uint32_t start = WOLFBOOT_PARTITION_BOOT_ADDRESS; + uint32_t end = WOLFBOOT_PARTITION_SWAP_ADDRESS + WOLFBOOT_SECTOR_SIZE; + + memset(page_buf, 0xFF, sizeof(page_buf)); + + for (addr = start; addr < end; addr += pflash_page_size) { + if (FLASH_VerifyErase(&pflash, addr, pflash_page_size) + == kStatus_FLASH_Success) { + FLASH_Program(&pflash, addr, page_buf, pflash_page_size); + } + } +} + +void hal_init(void) +{ +#ifdef __WOLFBOOT + /* lpc55s69 must run < 100 MHz for flash write/erase to work */ + BOARD_BootClockFROHF96M(); +// BOARD_BootClockPLL150M(); +#ifdef DEBUG_UART + uart_init(); + uart_write("lpc55s69 init\n", 14); +#endif +#endif + +#if defined(__WOLFBOOT) || !defined(TZEN) + memset(&pflash, 0, sizeof(pflash)); + FLASH_Init(&pflash); + hal_flash_fix_ecc(); +#endif + +#if defined(TZEN) && !defined(NONSECURE_APP) + hal_sau_init(); +#endif +} + +#ifdef __WOLFBOOT +/* Assert hook needed by SDK assert() macro. */ +void __assert_func(const char *a, int b, const char *c, const char *d) +{ + (void)a; + (void)b; + (void)c; + (void)d; + while (1) { + } +} + +void hal_prepare_boot(void) +{ +#ifdef TZEN + periph_unsecure(); +#endif +} +#endif + +int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len) +{ + uint8_t page_buf[512]; + uint32_t page_addr; + uint32_t offset; + uint32_t chunk; + + while (len > 0) { + page_addr = address & ~(pflash_page_size - 1); + offset = address - page_addr; + chunk = pflash_page_size - offset; + if ((uint32_t)len < chunk) + chunk = (uint32_t)len; + + if (FLASH_VerifyErase(&pflash, page_addr, pflash_page_size) + == kStatus_FLASH_Success) { + memset(page_buf, 0xFF, pflash_page_size); + } else { + memcpy(page_buf, (void *)page_addr, pflash_page_size); + + if (FLASH_Erase(&pflash, page_addr, pflash_page_size, + kFLASH_ApiEraseKey) != kStatus_FLASH_Success) + return -1; + } + + memcpy(page_buf + offset, data, chunk); + + if (FLASH_Program(&pflash, page_addr, page_buf, pflash_page_size) + != kStatus_FLASH_Success) + return -1; + + address += chunk; + data += chunk; + len -= (int)chunk; + } + + return 0; +} + +void RAMFUNCTION hal_flash_unlock(void) +{ +} + +void RAMFUNCTION hal_flash_lock(void) +{ +} + +int RAMFUNCTION hal_flash_erase(uint32_t address, int len) +{ + uint8_t page_buf[512]; + uint32_t pos; + + if (address % pflash_page_size != 0 || len % pflash_page_size != 0) + return -1; + + memset(page_buf, 0xFF, sizeof(page_buf)); + + for (pos = address; pos < address + (uint32_t)len; pos += pflash_page_size) { + if (FLASH_Erase(&pflash, pos, pflash_page_size, kFLASH_ApiEraseKey) + != kStatus_FLASH_Success) + return -1; + + if (FLASH_Program(&pflash, pos, page_buf, pflash_page_size) + != kStatus_FLASH_Success) + return -1; + } + + return 0; +} + +#ifdef WOLFCRYPT_SECURE_MODE +void hal_trng_init(void) +{ +#ifdef __WOLFBOOT + CLOCK_EnableClock(kCLOCK_Rng); + RESET_PeripheralReset(kRNG_RST_SHIFT_RSTn); +#endif + RNG_Init(RNG); +} + +void hal_trng_fini(void) +{ +} + +int hal_trng_get_entropy(unsigned char *out, unsigned int len) +{ + if (RNG_GetRandomData(RNG, out, len) == kStatus_Success) + return 0; + + return -1; +} +#endif + + +#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */ +#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */ +#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ +#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */ +#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */ +#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */ + +#ifdef DEBUG_UART +void uart_init(void) +{ + CLOCK_EnableClock(kCLOCK_Iocon); + const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */ + IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config); + const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */ + IOCON_PIO_FUNC1 | + /* No addition pin function */ + IOCON_PIO_MODE_INACT | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */ + IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config); + + /* attach 12 MHz clock to FLEXCOMM0 (debug console) */ + CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0); + CLOCK_EnableClock(kCLOCK_FlexComm0); + RESET_ClearPeripheralReset(kFC0_RST_SHIFT_RSTn); + + usart_config_t config; + USART_GetDefaultConfig(&config); + config.baudRate_Bps = 115200U; + config.enableTx = true; + config.enableRx = true; + (void)USART_Init(USART0, &config, 12000000U); +} + +void uart_write(const char *buf, unsigned int sz) +{ + const char *line; + unsigned int line_sz; + + while (sz > 0) + { + line = memchr(buf, '\n', sz); + if (line == NULL) { + (void)USART_WriteBlocking(USART0, (const uint8_t *)buf, sz); + break; + } + line_sz = (unsigned int)(line - buf); + if (line_sz > sz - 1U) { + line_sz = sz - 1U; + } + (void)USART_WriteBlocking(USART0, (const uint8_t *)buf, line_sz); + (void)USART_WriteBlocking(USART0, (const uint8_t *)"\r\n", 2U); + buf = line + 1; + sz -= line_sz + 1U; + } +} +#endif diff --git a/hal/lpc55s69.ld b/hal/lpc55s69.ld new file mode 100644 index 0000000000..077d26b9d3 --- /dev/null +++ b/hal/lpc55s69.ld @@ -0,0 +1,75 @@ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x10000000, LENGTH = @WOLFBOOT_KEYVAULT_ADDRESS@ - @ARCH_FLASH_OFFSET@ + RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 0x10000 /* 64K */ + RAM_HEAP (rwx) : ORIGIN = 0x30010000, LENGTH = 0xC000 /* 48K */ + RAM_KV (rwx) : ORIGIN = 0x3001C000, LENGTH = 0x2000 /* 8K */ + FLASH_KEYVAULT (rw) : ORIGIN = @WOLFBOOT_KEYVAULT_ADDRESS@, LENGTH = @WOLFBOOT_KEYVAULT_SIZE@ + FLASH_NSC (rx) : ORIGIN = @WOLFBOOT_NSC_ADDRESS@, LENGTH = @WOLFBOOT_NSC_SIZE@ +} + +SECTIONS +{ + + .text : + { + _start_text = .; + KEEP(*(.isr_vector)) + . = 0x200; + *(.keystore*) + *(.text*) + *(.rodata*) + *(.init*) + *(.fini*) + . = ALIGN(4); + _end_text = .; + } > FLASH + + .edidx : + { + . = ALIGN(4); + *(.ARM.exidx*) + } > FLASH + + .gnu.sgstubs : + { + . += 0x400; + . = ALIGN(4); + *(.gnu.sgstubs*) /* Secure Gateway Stubs */ + . = ALIGN(4); + } > FLASH_NSC + + _stored_data = .; + + .data : AT (_stored_data) + { + _start_data = .; + KEEP(*(.data*)) + . = ALIGN(4); + _end_data = .; + } > RAM + + .bss (NOLOAD) : + { + _start_bss = .; + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + _end_bss = .; + __bss_end__ = .; + _end = .; + } > RAM + . = ALIGN(4); +} + +END_STACK = ORIGIN(RAM) + LENGTH(RAM); + +_keyvault_origin = ORIGIN(RAM_KV); +_keyvault_size = LENGTH(RAM_KV); + +_flash_keyvault = ORIGIN(FLASH_KEYVAULT); +_flash_keyvault_size = LENGTH(FLASH_KEYVAULT); + +_start_heap = ORIGIN(RAM_HEAP); +_heap_size = LENGTH(RAM_HEAP); diff --git a/src/libwolfboot.c b/src/libwolfboot.c index b5dc650a72..9afa24fdc2 100644 --- a/src/libwolfboot.c +++ b/src/libwolfboot.c @@ -812,7 +812,6 @@ void RAMFUNCTION wolfBoot_update_trigger(void) #endif } - if (FLAGS_UPDATE_EXT()) { ext_flash_lock(); } else { diff --git a/src/update_flash.c b/src/update_flash.c index 054837d898..87bea33518 100644 --- a/src/update_flash.c +++ b/src/update_flash.c @@ -384,7 +384,7 @@ static int RAMFUNCTION wolfBoot_swap_and_final_erase(int resume) struct wolfBoot_image boot[1]; struct wolfBoot_image update[1]; struct wolfBoot_image swap[1]; - uint8_t updateState; + uint8_t updateState = IMG_STATE_NEW; int eraseLen = (WOLFBOOT_SECTOR_SIZE #ifdef NVM_FLASH_WRITEONCE /* need to erase the redundant sector too */ * 2 diff --git a/test-app/ARM-lpc55s69-ns.ld b/test-app/ARM-lpc55s69-ns.ld new file mode 100644 index 0000000000..aa3200f9eb --- /dev/null +++ b/test-app/ARM-lpc55s69-ns.ld @@ -0,0 +1,58 @@ +MEMORY +{ + FLASH (rx) : ORIGIN = @WOLFBOOT_TEST_APP_ADDRESS@, LENGTH = @WOLFBOOT_TEST_APP_SIZE@ + RAM (rwx) : ORIGIN = 0x20020000, LENGTH = 32K +} + +SECTIONS +{ + .text : + { + _start_text = .; + KEEP(*(.isr_vector)) + *(.init) + *(.fini) + *(.text*) + KEEP(*(.rodata*)) + . = ALIGN(4); + _end_text = .; + } > FLASH + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > FLASH + + _stored_data = .; + + .data : AT (_stored_data) + { + _start_data = .; + KEEP(*(.data*)) + . = ALIGN(4); + KEEP(*(.ramcode)) + . = ALIGN(4); + _end_data = .; + } > RAM + + .bss : + { + _start_bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + _end_bss = .; + _end = .; + } > RAM +} + +_wolfboot_partition_boot_address = @WOLFBOOT_PARTITION_BOOT_ADDRESS@; +_wolfboot_partition_size = @WOLFBOOT_PARTITION_SIZE@; +_wolfboot_partition_update_address = @WOLFBOOT_PARTITION_UPDATE_ADDRESS@; +_wolfboot_partition_swap_address = @WOLFBOOT_PARTITION_SWAP_ADDRESS@; + +PROVIDE(_start_heap = _end); +PROVIDE(end = _end); +PROVIDE(_end_stack = ORIGIN(RAM) + LENGTH(RAM)); diff --git a/test-app/ARM-lpc55s69.ld b/test-app/ARM-lpc55s69.ld new file mode 100644 index 0000000000..aa3200f9eb --- /dev/null +++ b/test-app/ARM-lpc55s69.ld @@ -0,0 +1,58 @@ +MEMORY +{ + FLASH (rx) : ORIGIN = @WOLFBOOT_TEST_APP_ADDRESS@, LENGTH = @WOLFBOOT_TEST_APP_SIZE@ + RAM (rwx) : ORIGIN = 0x20020000, LENGTH = 32K +} + +SECTIONS +{ + .text : + { + _start_text = .; + KEEP(*(.isr_vector)) + *(.init) + *(.fini) + *(.text*) + KEEP(*(.rodata*)) + . = ALIGN(4); + _end_text = .; + } > FLASH + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > FLASH + + _stored_data = .; + + .data : AT (_stored_data) + { + _start_data = .; + KEEP(*(.data*)) + . = ALIGN(4); + KEEP(*(.ramcode)) + . = ALIGN(4); + _end_data = .; + } > RAM + + .bss : + { + _start_bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + _end_bss = .; + _end = .; + } > RAM +} + +_wolfboot_partition_boot_address = @WOLFBOOT_PARTITION_BOOT_ADDRESS@; +_wolfboot_partition_size = @WOLFBOOT_PARTITION_SIZE@; +_wolfboot_partition_update_address = @WOLFBOOT_PARTITION_UPDATE_ADDRESS@; +_wolfboot_partition_swap_address = @WOLFBOOT_PARTITION_SWAP_ADDRESS@; + +PROVIDE(_start_heap = _end); +PROVIDE(end = _end); +PROVIDE(_end_stack = ORIGIN(RAM) + LENGTH(RAM)); diff --git a/test-app/Makefile b/test-app/Makefile index 514f00cf4c..89209734ee 100644 --- a/test-app/Makefile +++ b/test-app/Makefile @@ -566,6 +566,31 @@ ifeq ($(TARGET),mcxn) endif endif +ifeq ($(TARGET),lpc55s69) + ifeq ($(TZEN),1) + LSCRIPT_TEMPLATE=ARM-lpc55s69-ns.ld + CFLAGS:=$(filter-out -mcmse, $(CFLAGS)) + else + LSCRIPT_TEMPLATE=ARM-lpc55s69.ld + endif + APP_OBJS+=\ + $(MCUXPRESSO_PROJECT_TEMPLATE)/clock_config.o \ + $(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \ + $(MCUXPRESSO_DRIVERS)/drivers/fsl_reset.o \ + $(MCUXPRESSO)/drivers/common/fsl_common_arm.o \ + $(MCUXPRESSO)/drivers/flexcomm/fsl_flexcomm.o \ + $(MCUXPRESSO)/drivers/flexcomm/usart/fsl_usart.o \ + $(MCUXPRESSO)/drivers/iap1/fsl_iap.o \ + $(MCUXPRESSO)/drivers/lpc_gpio/fsl_gpio.o + ifeq ($(WOLFCRYPT_TZ),1) + APP_OBJS+=$(MCUXPRESSO)/drivers/rng_1/fsl_rng.o + endif + ifeq (,$(findstring nosys.specs,$(LDFLAGS))) + LDFLAGS+=--specs=nosys.specs + endif + LDFLAGS+=-Wl,--no-warn-rwx-segments +endif + ifeq ($(TARGET),imx_rt) LDFLAGS+=\ -mcpu=cortex-m7 -Wall --specs=nosys.specs -fno-common -ffunction-sections -fdata-sections \ diff --git a/test-app/app_lpc55s69.c b/test-app/app_lpc55s69.c new file mode 100644 index 0000000000..4582bd7a1b --- /dev/null +++ b/test-app/app_lpc55s69.c @@ -0,0 +1,215 @@ +/* app_lpc55s69.c + * + * Copyright (C) 2026 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +#include +#include "fsl_clock.h" +#include "fsl_gpio.h" +#include "fsl_iocon.h" + +#include "target.h" +#include "wolfboot/wolfboot.h" +#include "printf.h" + +#define RED_LED 6 +#define GREEN_LED 7 +#define BLUE_LED 4 + +extern void hal_init(void); + +#define IOCON_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */ +#define IOCON_PIO_MODE_PULLUP 0x20u /*!<@brief Selects pull-up function */ +#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */ +#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ +#define IOCON_PIO_DIGITAL_EN 0x0100u /*!<@brief Enables digital function */ +#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */ + +static void leds_init(void) +{ +#ifndef TZEN + CLOCK_EnableClock(kCLOCK_Iocon); + CLOCK_EnableClock(kCLOCK_Gpio1); +#endif + + /* red output off */ + GPIO->SET[1] = 1UL << RED_LED; + GPIO->DIR[1] |= 1UL << RED_LED; + /* green output off */ + GPIO->SET[1] = 1UL << GREEN_LED; + GPIO->DIR[1] |= 1UL << GREEN_LED; + /* blue output off */ + GPIO->SET[1] = 1UL << BLUE_LED; + GPIO->DIR[1] |= 1UL << BLUE_LED; + + const uint32_t LED_PINMUX_CONFIG = (/* Pin is configured as PIO */ + IOCON_PIO_FUNC0 | + /* Selects pull-up function */ + IOCON_PIO_MODE_PULLUP | + /* Standard mode, output slew rate control is enabled */ + IOCON_PIO_SLEW_STANDARD | + /* Input function is not inverted */ + IOCON_PIO_INV_DI | + /* Enables digital function */ + IOCON_PIO_DIGITAL_EN | + /* Open drain is disabled */ + IOCON_PIO_OPENDRAIN_DI); + IOCON_PinMuxSet(IOCON, 1, RED_LED, LED_PINMUX_CONFIG); + IOCON_PinMuxSet(IOCON, 1, GREEN_LED, LED_PINMUX_CONFIG); + IOCON_PinMuxSet(IOCON, 1, BLUE_LED, LED_PINMUX_CONFIG); +} + +static void check_parts( + uint32_t *pboot_ver, uint32_t *pupdate_ver, + uint8_t *pboot_state, uint8_t *pupdate_state +) +{ +#ifdef WOLFCRYPT_SECURE_MODE + *pboot_ver = wolfBoot_nsc_current_firmware_version(); + *pupdate_ver = wolfBoot_nsc_update_firmware_version(); + if (wolfBoot_nsc_get_partition_state(PART_BOOT, pboot_state) != 0) + *pboot_state = IMG_STATE_NEW; + if (wolfBoot_nsc_get_partition_state(PART_UPDATE, pupdate_state) != 0) + *pupdate_state = IMG_STATE_NEW; +#else + *pboot_ver = wolfBoot_current_firmware_version(); + *pupdate_ver = wolfBoot_update_firmware_version(); + if (wolfBoot_get_partition_state(PART_BOOT, pboot_state) != 0) + *pboot_state = IMG_STATE_NEW; + if (wolfBoot_get_partition_state(PART_UPDATE, pupdate_state) != 0) + *pupdate_state = IMG_STATE_NEW; +#endif + + wolfBoot_printf(" boot: ver=0x%lx state=0x%02x\n", *pboot_ver, *pboot_state); + wolfBoot_printf(" update: ver=0x%lx state=0x%02x\n", *pupdate_ver, *pupdate_state); +} + +void main(void) +{ + uint32_t boot_ver, update_ver; + uint8_t boot_state, update_state; + + hal_init(); + leds_init(); + + check_parts(&boot_ver, &update_ver, &boot_state, &update_state); + + if ( + boot_ver != 0 && + (boot_state == IMG_STATE_TESTING || boot_state == IMG_STATE_NEW) + ) + { +#ifdef WOLFCRYPT_SECURE_MODE + wolfBoot_printf("Calling wolfBoot_nsc_success()\n"); + wolfBoot_nsc_success(); +#else + wolfBoot_printf("Calling wolfBoot_success()\n"); + wolfBoot_success(); +#endif + check_parts(&boot_ver, &update_ver, &boot_state, &update_state); + } + + if (boot_ver == 1) + { + /* blue on */ + GPIO_PinWrite(GPIO, 1, BLUE_LED, 0); + + if (update_ver != 0) { + wolfBoot_printf("Update detected, version: 0x%lx\n", update_ver); + wolfBoot_printf("Triggering update...\n"); +#ifdef WOLFCRYPT_SECURE_MODE + wolfBoot_nsc_update_trigger(); +#else + wolfBoot_update_trigger(); +#endif + check_parts(&boot_ver, &update_ver, &boot_state, &update_state); + wolfBoot_printf("...done. Reboot to apply.\n"); + } + } + else { + /* green on */ + GPIO_PinWrite(GPIO, 1, GREEN_LED, 0); + } + + while (1) { + __asm__ volatile ("wfi"); + } +} + + +#include "sys/stat.h" +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + (void)pid; + (void)sig; + return -1; +} + +void _exit(int status) +{ + _kill(status, -1); + while (1) {} +} + +int _read(int file, char *ptr, int len) +{ + (void)file; + (void)ptr; + (void)len; + return -1; +} + +int _write(int file, char *ptr, int len) +{ + (void)file; + (void)ptr; + return len; +} + +int _close(int file) +{ + (void)file; + return -1; +} + +int _isatty(int file) +{ + (void)file; + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + (void)file; + (void)ptr; + (void)dir; + return 0; +} + +int _fstat(int file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +}