diff --git a/src/reginfo.c b/src/reginfo.c
index 3e25bdd..906b6cd 100644
--- a/src/reginfo.c
+++ b/src/reginfo.c
@@ -801,6 +801,7 @@ MUXCTRL(CV300_muxctrl_reg62, 0x120400F8, "GPIO0_1", "TEMPER_DQ")
 MUXCTRL(CV300_muxctrl_reg63, 0x120400FC, "GPIO8_0", "SAR_ADC_CH0")
 MUXCTRL(CV300_muxctrl_reg64, 0x12040100, "GPIO8_1", "SAR_ADC_CH1")
 MUXCTRL(CV300_muxctrl_reg65, 0x12040104, "GPIO8_2", "SAR_ADC_CH2")
+MUXCTRL(CV300_muxctrl_reg66, 0xdeadbeef, "GPIO0_2")
 
 static const muxctrl_reg_t *CV300regs[] = {
     &CV300_muxctrl_reg0,  &CV300_muxctrl_reg1,  &CV300_muxctrl_reg2,
@@ -824,7 +825,7 @@ static const muxctrl_reg_t *CV300regs[] = {
     &CV300_muxctrl_reg55, &CV300_muxctrl_reg56, &CV300_muxctrl_reg57,
     &CV300_muxctrl_reg58, &CV300_muxctrl_reg59, &CV300_muxctrl_reg60,
     &CV300_muxctrl_reg61, &CV300_muxctrl_reg62, &CV300_muxctrl_reg63,
-    &CV300_muxctrl_reg64, &CV300_muxctrl_reg65, 0,
+    &CV300_muxctrl_reg64, &CV300_muxctrl_reg65,  &CV300_muxctrl_reg66, 0,
 };
 
 MUXCTRL(CV500_iocfg_reg0, 0x10FF0000, "EMMC_CLK", "SFC_CLK", "SFC_BOOT_MODE")
diff --git a/src/tools.c b/src/tools.c
index 86d4deb..322eb81 100644
--- a/src/tools.c
+++ b/src/tools.c
@@ -34,6 +34,13 @@ bool mem_reg(uint32_t addr, uint32_t *data, enum REG_OPS op) {
     static uint32_t loaded_offset;
     static uint32_t loaded_size;
 
+    // do nothing if no pinmux for this GPIO
+    if (addr == 0xdeadbeef) {
+        if (op == OP_READ)
+            *data = 0;  //
+        return true;
+    }
+
     uint32_t offset = addr & 0xffff0000;
     uint32_t size = 0xffff;
     if (!addr || (loaded_area && offset != loaded_offset)) {